Titre : | A raport submitted in partial fulfilement of the degree of Master of engineering in computer science | Type de document : | projet fin études | Auteurs : | Chbili Jaafar, Auteur | Année de publication : | 2014 | Langues : | Anglais (eng) | Catégories : | Systèmes embarqués et mobiles
| Index. dĂ©cimale : | 1251/14 | RĂ©sumĂ© : | The present paper incorporates my engineering graduation project synthesis. My internship was held in the National Institute of Standards and Technology, a physical science laboratory part of the U.S. Department of Commerce. This internship is part of a research project which involves the design and implementation of an embedded system that can perform massively parallel reliability experiments on hundreds of transistors. Reliability experiment setups are systems used to explore and project the impact of degradation mechanisms on the operation and lifetime of the device under test. The currently used setups allow the user to run experiments on a very limited number of devices one at a time. In addition, it might require moving the device or changing the system inputs during the experiment which may bias the results and lead to a misinterpretation of the observations. The following paper provides a brief overview of the physics behind transistor’s reliability. Next, it states our project’s specifications and goes through all stages of design and implementation of the massively parallel BTI system in its very first version. |
A raport submitted in partial fulfilement of the degree of Master of engineering in computer science [projet fin études] / Chbili Jaafar, Auteur . - 2014. Langues : Anglais ( eng) Catégories : | Systèmes embarqués et mobiles
| Index. dĂ©cimale : | 1251/14 | RĂ©sumĂ© : | The present paper incorporates my engineering graduation project synthesis. My internship was held in the National Institute of Standards and Technology, a physical science laboratory part of the U.S. Department of Commerce. This internship is part of a research project which involves the design and implementation of an embedded system that can perform massively parallel reliability experiments on hundreds of transistors. Reliability experiment setups are systems used to explore and project the impact of degradation mechanisms on the operation and lifetime of the device under test. The currently used setups allow the user to run experiments on a very limited number of devices one at a time. In addition, it might require moving the device or changing the system inputs during the experiment which may bias the results and lead to a misinterpretation of the observations. The following paper provides a brief overview of the physics behind transistor’s reliability. Next, it states our project’s specifications and goes through all stages of design and implementation of the massively parallel BTI system in its very first version. |
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